perf(dflash): enable grouped MMID on RDNA#557
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Summary
Extends the grouped MMID (
MUL_MAT_ID) batch gate to AMD RDNA3 and RDNA4 while keeping the HIP path opt-in and default-off. Adds a portable grouped-versus-legacy dispatch and numerical regression test for CUDA and HIP, and wires it into both GPU CI lanes.Changes
get_mmvq_mmid_max_batch()to admit RDNA3/RDNA4 for grouped MMID.DFLASH_MMID_GROUPED=1.How it works
The grouped kernel sorts
(token, slot)pairs by routed expert so each unique expert weight stream is consumed once per MoE batch. The gate returnsMMVQ_MAX_MOE_BATCH_SIZEwhen grouped dispatch is enabled, the quant type is supported, and the device is NVIDIA Turing+ or AMD RDNA3/RDNA4. CUDA graphs remain available for these batches.The regression runs identical deterministic inputs in separate legacy and grouped child processes. Telemetry verifies the selected route. All 25 output slices are checked: shared MMVQ cases must be byte-identical, while cases newly moved from MMQ to grouped MMVQ use the legacy MMQ output as an independent numerical oracle.
Local verification
sm_89), WSL2 Ubuntu, CUDA 12.6cmake -B server/build-cuda-mmid -S server -DGGML_CUDA=ON -DGGML_CUDA_GRAPHS=ON -DGGML_CUDA_FA=OFF -DDFLASH27B_TESTS=ON -DCMAKE_CUDA_ARCHITECTURES=89ctest --test-dir server/build-cuda-mmid --output-on-failure -R '^deepseek4_mmid_grouped_cuda$'legacy_status=0 grouped_status=0 bytes=798720 compared_cases=25 exact_cases=25 tolerant_cases=0 compared_bytes=798720 legacy_grouped=0 grouped_grouped=25 parity=PASSgit diff --checkpasses.Limitations