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feat(configs): set gcc16 as default and update configs (#51) CI #153: Commit f50f274 pushed by rezado
12m 44s main
main
12m 44s
feat(configs): set gcc16 as default and update configs CI #152: Pull request #51 opened by rezado
11m 53s feature/spec-gcc16-default
feature/spec-gcc16-default
11m 53s
build(am): package RVH functional tests (#50) CI #151: Commit f662b23 pushed by xiaokamikami
11m 1s main
main
11m 1s
build(am): package RVH bare-metal regression tests CI #150: Pull request #50 synchronize by xiaokamikami
12m 54s feat/rvh-functional-workload
feat/rvh-functional-workload
12m 54s
build(am): package RVH bare-metal regression tests CI #149: Pull request #50 synchronize by xiaokamikami
13m 7s feat/rvh-functional-workload
feat/rvh-functional-workload
13m 7s
build(am): package RVH bare-metal regression tests CI #148: Pull request #50 opened by xiaokamikami
11m 10s feat/rvh-functional-workload
feat/rvh-functional-workload
11m 10s
fix(dts): align XiangShan profiles with NEMU OpenSBI (#49) CI #147: Commit 5a7951f pushed by poemonsense
17m 23s main
main
17m 23s
fix(dts): align XiangShan profiles with NEMU OpenSBI CI #146: Pull request #49 opened by rezado
15m 46s fix-dts
fix-dts
15m 46s
fix(dts): remove smrnmi which opensbi not support CI #145: Pull request #47 opened by rezado
12m 50s fix-dts-smrnmi
fix-dts-smrnmi
12m 50s
fix(spec2017):change multihart default dtb to 16GB (#46) CI #144: Commit 405d5de pushed by rezado
13m 4s main
main
13m 4s
fix(spec2017):change multihart default dtb to 16GB CI #143: Pull request #46 opened by rezado
12m 28s fix-spec17-2harts-dtb
fix-spec17-2harts-dtb
12m 28s
feat(multihart): add riscv isa extensions for multihart workloads (#45) CI #142: Commit 0ac5f6a pushed by rezado
13m 29s main
main
13m 29s
feat(multihart): add riscv isa extensions for multihart workloads CI #141: Pull request #45 opened by rezado
12m 25s fix-multihart-isa
fix-multihart-isa
12m 25s
bump libcheckpoint (#44) CI #140: Commit 72107b5 pushed by rezado
12m 45s main
main
12m 45s
bump libcheckpoint CI #139: Pull request #44 opened by rezado
13m 10s bump-libcheckpoint
bump-libcheckpoint
13m 10s
feat(spec): export debug artifacts with workload images (#43) CI #138: Commit c009e3a pushed by rezado
13m 31s main
main
13m 31s
feat(spec): export debug artifacts with workload images CI #137: Pull request #43 synchronize by rezado
13m 25s feat-debug-artifacts
feat-debug-artifacts
13m 25s
feat(spec): export debug artifacts with workload images CI #136: Pull request #43 synchronize by rezado
13m 11s feat-debug-artifacts
feat-debug-artifacts
13m 11s
feat(spec): export debug artifacts with workload images CI #135: Pull request #43 opened by rezado
12m 56s feat-debug-artifacts
feat-debug-artifacts
12m 56s
fix(spec2026): fix speed mode input generation (#42) CI #134: Commit 960f471 pushed by rezado
13m 0s main
main
13m 0s
fix(spec2026): fix speed mode input generation CI #133: Pull request #42 opened by rezado
13m 6s fix-spec26-speed
fix-spec26-speed
13m 6s
chore(dts): lowercase dts from mem16G to mem16g (#41) CI #132: Commit 868cea8 pushed by klin02
13m 4s main
main
13m 4s
chore(dts): lowercase dts from mem16G to mem16g CI #131: Pull request #41 synchronize by klin02
13m 29s dts-16g-lower
dts-16g-lower
13m 29s
chore(dts): lowercase dts from mem16G to mem16g CI #130: Pull request #41 opened by klin02
12m 48s dts-16g-lower
dts-16g-lower
12m 48s
feat(dts): add xiangshan-fpga-AIA-mem16g.dts (#40) CI #129: Commit 3afcec0 pushed by klin02
11m 26s main
main
11m 26s