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[WIP][LLVM][FlyDSL] Bump up LLVM and Adapt FlyDSL to upstream LLVM/MLIR API changes - #945

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[WIP][LLVM][FlyDSL] Bump up LLVM and Adapt FlyDSL to upstream LLVM/MLIR API changes#945
jli-melchior wants to merge 17 commits into
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@jli-melchior jli-melchior commented Jul 31, 2026 •
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Motivation

Adapt FlyDSL to LLVM API changes. This PR updates both C++ and Python layers to match upstream LLVM/ROCDL breaking changes.

Technical Details

C++ changes

  • OpaqueProperties → PropertyRef
  • getType() → getSourceElementType() for GEP
  • getSizeInBits() → getTypeSizeInBits()
  • MFMA/WMMA enum attribute constructors

Python compat wrappers (expr/rocdl/init.py)

  • MFMA blgp: int → #rocdl<mfma_perm_b ...> attribute
  • MFMA scale cbsz/blgp: int → #rocdl<matrix_format ...> attribute
  • WMMA fmtA/fmtB/modC/scaleType/fmtScale: int → ROCDL enum attributes
  • sched_barrier/sched_group_barrier: int mask → #rocdl<sched_group_mask ...> attribute
  • buffer_load/buffer_store/buffer_load_lds: aux from positional Value → keyword Attribute
  • buffer_atomic_fadd/buffer_atomic_fmax: added leading res type, aux as keyword Attribute
  • tensor_load_to_lds/tensor_store_from_lds: cache_policy as keyword Attribute
  • global_prefetch: scope from positional → cache_policy keyword

Compiler/backend

  • gpu.func kernel attribute: accept both "kernel" and "gpu.kernel"
  • waves_per_eu: use native rocdl.waves_per_eu attribute instead of passthrough string

Build infrastructure

  • llvm-hash.txt → llvm-build-info.json

Known regressions from LLVM base update (to investigate separately)

  • test_conv3d_implicit_fp8[1-96-4-8-9-96-1-1]: rel_err 0.31 (threshold 0.05)
  • test_rmsnorm_dynamicquant: quant diff 116 on M=64, N=2000, f32

Test Plan

Test Result

Submission Checklist

@jli-melchior jli-melchior changed the title [llvm] bump up llvm for upstream and internal coexec opt and adapt flydsl api [wip][llvm][flydsl] bump up llvm for upstream and internal coexec opt and adapt flydsl api Jul 31, 2026
@jli-melchior jli-melchior changed the title [wip][llvm][flydsl] bump up llvm for upstream and internal coexec opt and adapt flydsl api [WIP][LLVM][Flydsl] bump up llvm for upstream and internal coexec opt and adapt flydsl api Jul 31, 2026
@Boss2002n
Boss2002n force-pushed the jli/update-llvm-basemain branch 3 times, most recently from 0694bb6 to fc5250c Compare August 5, 2026 05:46
@coderfeli

coderfeli commented Aug 5, 2026

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@jli-melchior still failed.

@Boss2002n
Boss2002n force-pushed the jli/update-llvm-basemain branch from 58cc8b2 to 9bb26a4 Compare August 5, 2026 07:28
@jli-melchior jli-melchior changed the title [WIP][LLVM][Flydsl] bump up llvm for upstream and internal coexec opt and adapt flydsl api [WIP][LLVM][FlyDSL] Bump up LLVM and Adapt FlyDSL to upstream LLVM/MLIR API changes Aug 5, 2026
jli-melchior and others added 16 commits August 6, 2026 02:43
@jli-melchior
[llvm] add build script for internal llvm
fbf8463
@jli-melchior @claude
[llvm] adapt FlyDSL to internal LLVM API changes
f65f156 
Update build scripts to read repo/commit from internal-llvm-build-info.json
and tag build/install directories with the commit short hash. Fix C++ API
breakage introduced by the internal LLVM:

- OpaqueProperties → PropertyRef in inferReturnTypes
- Buffer op aux parameter from Value → Attribute
- Atomic buffer ops now require explicit result Type
- MFMA blgp parameter from IntegerAttr → MFMAPermB enum
- MFMA scale cbsz/blgp from IntegerAttr → MatrixFormat enum
- WMMA modC from raw uint16_t → WMMACModifier enum
- WMMA scale params from raw casts → typed ROCDL enums
- TDM cachePolicy from uint32_t → Attribute
- DenseMapInfo: remove sentinel keys (tombstone-free hashing)

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[llvm] merge LLVM build info into single JSON config
88fd2ee 
Consolidate internal-llvm-build-info.json and llvm-hash.txt into a
single thirdparty/llvm-build-info.json with "upstream" and "internal"
entries. Build scripts select by key name:
- build_llvm.sh reads ['upstream']
- build_internal_llvm.sh / build_internal_flydsl.sh read ['internal']

Update CI workflows (build-whl, flydsl, build-custom-llvm-tools) to
use llvm-build-info.json for cache keys and commit lookups.

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[style] clang-format C++ files touched by LLVM API adaptation
34057db 
Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[compat] Wrap ROCDL ops to preserve backward-compatible Python API
c196b18 
The internal LLVM update changed several ROCDL ops: operands became
keyword-only attributes (aux, mask, cache_policy) and WMMA sign params
were removed. Add compatibility wrappers in expr/rocdl so downstream
callers (e.g. aiter) continue to work without source changes.

- raw_ptr_buffer_load: accept aux as positional, convert Value/int → Attr
- raw_ptr_buffer_load_lds: same aux handling
- sched_barrier / sched_group_barrier: convert int mask → SchedGroupMask enum attr
- tensor_load_to_lds / tensor_store_from_lds: accept cache_policy as positional
- tdm_ops: pass cache_policy as keyword to underlying ROCDL ops

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[compat] Convert WMMA int params to ROCDL enum attributes
aacf727 
The internal LLVM update changed WMMA op parameters (fmtA, fmtB, modC,
scaleAType, scaleBType, fmtScaleA, fmtScaleB) from plain integers to
typed ROCDL enum attributes. Add int-to-enum conversion in the existing
wmma_scale_f32_16x16x128_f8f6f4, wmma_scale_f32_32x16x128_f4, and
wmma_f32_16x16x128_fp8_fp8 wrappers so downstream callers passing ints
continue to work.

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[compat] Fix buffer_ops aux param: Value → keyword Attribute
6aade64 
RawPtrBufferLoadOp/StoreOp aux changed from a positional Value operand
to a keyword-only Attribute in the internal LLVM update. Convert the
cache_modifier int to IntegerAttr and pass as keyword.

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[compat] Fix global_prefetch scope param: positional → keyword
7d42d5a 
global_prefetch's second param changed from positional `scope` to
keyword-only `cache_policy` in the LLVM binding regeneration.
l2_prefetch_tile was the only call site missed — fix it to use
cache_policy=_cache_policy_attr(scope), consistent with the
tensor_load_to_lds/tensor_store_from_lds fixes in the same file.

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[style] black + ruff format compat changes
6e8b866 
Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[style] reformat compat changes with CI-matching black
0e03a7a 
Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[compat] Convert MFMA int blgp/cbsz to ROCDL enum attributes
2b05738 
The upstream LLVM changed blgp from I32Attr to ROCDL_MFMAPermBAttr and
cbsz/blgp in mfma_scale from I32Attr to ROCDL_MatrixFormatAttr. The
AttrBuilder is not registered for these enum types, so passing a plain
int causes std::bad_cast at op creation time.

Add _blgp_attr() to convert int blgp values to #rocdl<mfma_perm_b ...>
attributes in _split_mfma_operands, and reuse _wmma_fmt() for the
mfma_scale cbsz/blgp (ROCDL_MatrixFormatAttr).

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[compat] Fix buffer_atomic_fadd/fmax: add res type, aux as keyword At…
550f3dc 
…tribute

The upstream LLVM added a leading `res` (result type) parameter to
raw_ptr_buffer_atomic_fadd/fmax and changed `aux` from positional Value
to keyword-only Attribute. The old wrapper passed vdata as the first
arg, which was misinterpreted as the result type causing std::bad_cast.

Infer the result type from vdata.type, convert int aux to IntegerAttr,
and pass aux as keyword.

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[compat] Fix gpu.func kernel attribute name: gpu.kernel → kernel
d562970 
Upstream LLVM renamed the gpu.func kernel marker attribute from
"gpu.kernel" to "kernel". The _iter_gpu_kernel_funcs helper failed to
match any kernel functions, so lower_compile_hints silently skipped the
waves_per_eu passthrough override.

Accept both "kernel" and "gpu.kernel" for backward compatibility.

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior @claude
[compat] Use native rocdl.waves_per_eu instead of passthrough string
23ec116 
Upstream LLVM now lowers rocdl.waves_per_eu directly to the LLVM IR
"amdgpu-waves-per-eu" function attribute. The old approach of deleting
the native attribute and adding a passthrough string no longer works.

Set rocdl.waves_per_eu directly with the override value. Update tests
to match the new single-value format ("2" instead of "2,2").

Co-Authored-By: Claude <noreply@anthropic.com>
@jli-melchior
[compat] Update mma_atom_stateful FileCheck for ROCDL enum cbsz/blgp
9cee50b 
Upstream LLVM/MLIR changed rocdl.mfma.scale to print cbsz and blgp as
enum keywords (fp8_e4m3, fp8_e5m2, fp4_e2m1) instead of raw integers.
Update the three CHECK lines in mma_atom_stateful.mlir to match.
@jli-melchior
[compat] Update gfx1250 FileCheck tests for ROCDL op format changes
966c4b0 
- mma_scale_gfx1250.mlir: wmma.scale/scale16 ops now print named enum
  keyword attrs (fmtA, fmtB, modC, scaleAType, ...) instead of integer
  dict attrs; modC=1 prints as "neg" instead of "1 : i16".
- tdm_gfx1250.mlir: tensor.load.to.lds / tensor.store.from.lds changed
  cachepolicy from keyword syntax ("cachepolicy 0") to positional (", 0").
@Boss2002n
Boss2002n force-pushed the jli/update-llvm-basemain branch from 9d6415a to 966c4b0 Compare August 6, 2026 02:44
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2 participants

@jli-melchior @coderfeli