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jameshanlon
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hex-processor
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Message passing 2
- #8
#8
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jameshanlon
merged 12 commits into
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May 31, 2026
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Message passing 2
#8
jameshanlon
merged 12 commits into
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jameshanlon/hex-processor:master
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message-passing-2
jameshanlon/hex-processor:message-passing-2
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Commits on May 30, 2026
Build Verilator from source via FetchContent
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Prefer a system Verilator, else fetch/build a pinned one
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RTL package: add IN/OUT opcodes, network params and flit structs
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Add stateless NxN routing crossbar with round-robin arbitration
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Add per-core link interface: route table, per-slot rx buffers, send/recv/ACK FSM
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Use a cmake_minimum_required version range (3.20...3.28)
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Add processor channel stall and the core wrapper
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Add network top and shared HEXN container reader
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Commits on May 31, 2026
Run the multi-core network on the Verilator testbench
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Add message-passing golden cross-check tests
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Add pingpong and ring example parallel programs
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Address code review findings
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