Computer Engineering student at Toronto Metropolitan University.
Currently looking for a co-op position in embedded systems, hardware design, or computer architecture.
- Building out my RISC-V CPU simulator, adding more instructions and sample programs
- Coursework in discrete math, algorithms, and digital systems
| Project | Description | Stack |
|---|---|---|
| RISC-V CPU Simulator | Software simulation of a RISC-V processor with fetch-decode-execute pipeline and built-in assembler | Java |
| 8-Bit Micro-coded ALU Processor | Dual ALU with FSM control unit, synthesized and deployed on an Intel DE2 FPGA board | Verilog · Quartus |
| Java Bookstore Application | Multi-user desktop app using OOP design patterns, including State and Singleton | Java · JavaFX |
Languages: Java · Verilog · Python · C++ · C#
Hardware: FPGA · Intel DE2 Board · Quartus Prime · ModelSim
Concepts: Computer Architecture · Digital Logic · OOP · Data Structures & Algorithms
Computer Engineering @ TMU · Open to Co-op