Enable display driver for Luckfox Pico Ultra and 86Panel

drivers/gpu/drm/panel/panel-simple.c

@@ -487,6 +487,7 @@ static int panel_dpi_probe(struct device *dev,
 
 	of_property_read_u32(np, "width-mm", &desc->size.width);
 	of_property_read_u32(np, "height-mm", &desc->size.height);
+	of_property_read_u32(np, "bus-format", &desc->bus_format);
 
 	/* Extract bus_flags from display_timing */
 	bus_flags = 0;

drivers/gpu/drm/rockchip/rockchip_rgb.c

@@ -7,7 +7,9 @@
 
 #include <linux/component.h>
 #include <linux/media-bus-format.h>
+#include <linux/mfd/syscon.h>
 #include <linux/of_graph.h>
+#include <linux/regmap.h>
 
 #include <drm/display/drm_dp_helper.h>
 #include <drm/drm_atomic_helper.h>
@@ -21,6 +23,18 @@
 #include "rockchip_drm_drv.h"
 #include "rockchip_rgb.h"
 
+/*
+ * RV1106 routes the VOP's parallel-RGB output through two GRF "bypass"
+ * gates that come up enabled at reset. The vendor 5.10 rgb driver
+ * clears them (HIWORD write, bits[1:0]=0) on enable; mainline's
+ * rockchip_rgb is a stripped library that never touches the GRF, so on
+ * a fresh boot the data path stays in bypass and the panel shows
+ * corrupted output. Clear both gates for the RGB use case.
+ */
+#define RV1106_VENC_GRF_VOP_IO_WRAPPER	0x1000c
+#define RV1106_VOGRF_VOP_PIPE_BYPASS	0x60034
+#define RV1106_GRF_BYPASS_CLEAR		(0x3 << 16) /* mask bits[1:0], value 0 */
+
 struct rockchip_rgb {
 	struct device *dev;
 	struct drm_device *drm_dev;
@@ -45,17 +59,28 @@ rockchip_rgb_encoder_atomic_check(struct drm_encoder *encoder,
 	else
 		bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 
+	/*
+	 * output_bpc gates the dither-down stage in vop_crtc_atomic_enable
+	 * (it computes dither_bpc = output_bpc ? : 10 and only enables dither
+	 * when that is 6). Mainline sets output_bpc only on the eDP path, so a
+	 * raw-RGB panel kept out_mode=P666 with the 24->18-bit dither block
+	 * disabled and the parallel output was truncated, not reduced. Set it
+	 * from the bus format so the dither stage matches the panel depth.
+	 */
 	switch (bus_format) {
 	case MEDIA_BUS_FMT_RGB666_1X18:
 		s->output_mode = ROCKCHIP_OUT_MODE_P666;
+		s->output_bpc = 6;
 		break;
 	case MEDIA_BUS_FMT_RGB565_1X16:
 		s->output_mode = ROCKCHIP_OUT_MODE_P565;
+		s->output_bpc = 5;
 		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 	default:
 		s->output_mode = ROCKCHIP_OUT_MODE_P888;
+		s->output_bpc = 8;
 		break;
 	}
 
@@ -168,6 +193,30 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev,
 		goto err_free_connector;
 	}
 
+	/*
+	 * RV1106: take the VOP->RGB IO wrapper and VOP pipe out of bypass.
+	 * These GRF gates reset to "bypass" and mainline never clears them,
+	 * leaving the parallel-RGB data path corrupted. Guarded on the GRF
+	 * being the rv1106 grf so this is a no-op on other SoCs.
+	 */
+	{
+		struct device_node *grf_np;
+		struct regmap *grf;
+
+		grf_np = of_parse_phandle(dev->of_node, "rockchip,grf", 0);
+		if (grf_np && of_device_is_compatible(grf_np, "rockchip,rv1106-grf")) {
+			grf = syscon_node_to_regmap(grf_np);
+			if (!IS_ERR(grf)) {
+				regmap_write(grf, RV1106_VENC_GRF_VOP_IO_WRAPPER,
+					     RV1106_GRF_BYPASS_CLEAR);
+				regmap_write(grf, RV1106_VOGRF_VOP_PIPE_BYPASS,
+					     RV1106_GRF_BYPASS_CLEAR);
+				DRM_DEV_INFO(dev, "rv1106: cleared VOP RGB bypass gates\n");
+			}
+		}
+		of_node_put(grf_np);
+	}
+
 	return rgb;
 
 err_free_connector:

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

@@ -1122,6 +1122,28 @@ static const struct vop_data rk3328_vop = {
 	.max_output = { 4096, 2160 },
 };
 
+/*
+ * RV1106 VOP. The IP is functionally identical to PX30's "lit" VOP variant
+ * (which is itself the same IP as RK3366-LIT in the vendor SDK) -- register
+ * addresses, interrupt layout, and single-primary-window structure all match,
+ * so we reuse PX30's per-block tables verbatim. RV1106-specific bits from the
+ * vendor 5.10 source are: a different VOP_VERSION (2, 0xc), a smaller native
+ * resolution cap (1280x1280), and a GRF-driven dclk-inversion knob. The GRF
+ * knob has no 6.6 equivalent (struct vop_data lost grf_ctrl), so we skip it;
+ * it can be re-added via a driver-core change later if a board needs it.
+ */
+static const struct vop_data rv1106_vop = {
+	.version = VOP_VERSION(2, 0xc),
+	.intr = &px30_intr,
+	.feature = VOP_FEATURE_INTERNAL_RGB,
+	.common = &px30_common,
+	.modeset = &px30_modeset,
+	.output = &px30_output,
+	.win = px30_vop_lit_win_data,
+	.win_size = ARRAY_SIZE(px30_vop_lit_win_data),
+	.max_output = { 1280, 1280 },
+};
+
 static const struct of_device_id vop_driver_dt_match[] = {
 	{ .compatible = "rockchip,rk3036-vop",
 	  .data = &rk3036_vop },
@@ -1149,6 +1171,8 @@ static const struct of_device_id vop_driver_dt_match[] = {
 	  .data = &rk3228_vop },
 	{ .compatible = "rockchip,rk3328-vop",
 	  .data = &rk3328_vop },
+	{ .compatible = "rockchip,rv1106-vop",
+	  .data = &rv1106_vop },
 	{},
 };
 MODULE_DEVICE_TABLE(of, vop_driver_dt_match);

drivers/nvmem/rockchip-otp.c

@@ -743,6 +743,7 @@ static struct nvmem_config otp_config = {
 	.read_only = true,
 	.reg_read = rockchip_otp_read,
 	.reg_write = rockchip_otp_write,
+	.add_legacy_fixed_of_cells = true,
 	.stride = 1,
 	.word_size = 1,
 };

drivers/soc/rockchip/Makefile

@@ -11,7 +11,6 @@ obj-$(CONFIG_ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
 obj-$(CONFIG_ROCKCHIP_HW_DECOMPRESS_USER) += rockchip_decompress_user.o
 obj-$(CONFIG_ROCKCHIP_IODOMAIN) += io-domain.o
 obj-$(CONFIG_ROCKCHIP_IOMUX) += iomux.o
-obj-$(CONFIG_ROCKCHIP_PM_DOMAINS) += pm_domains.o
 obj-$(CONFIG_ROCKCHIP_DTPM) += dtpm.o
 obj-$(CONFIG_ROCKCHIP_FIQ_DEBUGGER) += fiq_debugger/
 obj-$(CONFIG_ROCKCHIP_VENDOR_STORAGE) += rk_vendor_storage.o