Enable PCIe for Shikra#684
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Document the compatible of the Shikra PCIe phy which supports Gen2x1. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
Add dedicated schema for the PCIe controller found on Shikra. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
Add devicetree bindings for TC9563 GPIO's which are used to control endpoint power and reset. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
Add QMP PCIe PHY Gen2x1 support. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
Use cfg_1_9_0 to enable and configure single PCIe controller present on Shikra. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
…eset Some platform utilise TC9563 GPIOs to enable power and control reset of endpoints. This patch adds support to parse endpoint reset and power enable gpios from each TC9563 port node in the devicetree. To configure these GPIO's during the POWER ON sequence, two new API's are introduced: tc9563_ep_pwr_en() and tc9563_ep_assert_deassert_reset(). Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
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Merge Check Failed: No CR Numbers Found Error: No Change Request numbers were found. Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests. |
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Merge Check Failed: No CR Numbers Found Error: No Change Request numbers were found. Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests. |
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Merge Check Failed: CR Not Eligible for Merge CR 4530098 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
Shikra supports single PCIe instance with 5GT/s x1 lane. Add PCIe controller and PHY node for this single instance. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
…e for PCIe Add a node for the TC9563 PCIe switch connected to PCIe. The switch has three downstream ports.Two embedded Ethernet devices are present on one of the downstream ports. All the ports present in the node represent the downstream ports and embedded endpoints. Power to the TC9563 is supplied through two LDO regulators, which are on by default and are added as fixed regulators. TC9563 can be configured through I2C. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
…e for PCIe Add a node for the TC9563 PCIe switch connected to PCIe. The switch has three downstream ports.Two embedded Ethernet devices are present on one of the downstream ports. All the ports present in the node represent the downstream ports and embedded endpoints. Power to the TC9563 is supplied through two LDO regulators, which are on by default and are added as fixed regulators. TC9563 can be configured through I2C. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
…e for PCIe Add a node for the TC9563 PCIe switch connected to PCIe. The switch has three downstream ports.Two embedded Ethernet devices are present on one of the downstream ports. All the ports present in the node represent the downstream ports and embedded endpoints. Power to the TC9563 is supplied through two LDO regulators, which are on by default and are added as fixed regulators. TC9563 can be configured through I2C. Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
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Merge Check Failed: CR Not Eligible for Merge CR 4530098 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
Test Matrix
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Test Matrix
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"qli-2.0 GA Critical Fix" |
This series enables PCIe on Shikra.
Exception JIRA: https://jira-dc.qualcomm.com/jira/projects/QLIJIRA/issues/QLIJIRA-127?filter=allopenissues
CRs-Fixed: 4530098