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fix(loongarch64): preserve firmware PCI bridge bus numbers - #386

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dallasxy merged 3 commits into
syswonder:devfrom
weifenjihe:fixLArelease
Aug 24, 2026
Merged

fix(loongarch64): preserve firmware PCI bridge bus numbers#386
dallasxy merged 3 commits into
syswonder:devfrom
weifenjihe:fixLArelease

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@weifenjihe

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Issue

On LS3A6000, root Linux stops at:

Waiting for root device /dev/nvme0n1p4...

The physical bridge 00:0d.0 uses secondary bus 05, but bridge_bus_reg incorrectly initializes it as 01, preventing Linux from discovering the NVMe device at 05:00.0.

Change

For identity-mapped physical PCI bridges on LoongArch with CONFIG_NO_PCIE_BAR_REALLOC=y, initialize bridge_bus_reg from the hardware register at offset 0x18.

Other architectures and remapped PCI bridges are unaffected.

Verification

  • Root Linux successfully discovers the NVMe device and boots

@github-actions github-actions Bot added bug Something isn't working loongarch64 labels Aug 24, 2026
@li041
li041 requested review from dallasxy and li041 August 24, 2026 02:50
@li041

li041 commented Aug 24, 2026

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Thanks for the contribution. This fixes the reported LS3A6000 boot issue by preserving the firmware-programmed bridge_bus_reg.

However, this fix is still not general: it is restricted to loongarch64_pcie, and self.vbdf == self.bdf also excludes bridges whose device/function is remapped while the bus remains identity-mapped.

Could we preserve the firmware bus register during PCI enumeration for all no_pcie_bar_realloc backends, then preserve or translate it according to the virtual bus mapping?

Cache the firmware-programmed bridge bus register during enumeration for no_pcie_bar_realloc backends. Preserve it for identity bus mappings and translate primary, secondary, and subordinate bus numbers when a zone remaps buses.
@weifenjihe

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Thanks for the contribution. This fixes the reported LS3A6000 boot issue by preserving the firmware-programmed bridge_bus_reg.

However, this fix is still not general: it is restricted to loongarch64_pcie, and self.vbdf == self.bdf also excludes bridges whose device/function is remapped while the bus remains identity-mapped.

Could we preserve the firmware bus register during PCI enumeration for all no_pcie_bar_realloc backends, then preserve or translate it according to the virtual bus mapping?

Thanks for the suggestion. I’ve reworked the patch accordingly.

For all no_pcie_bar_realloc backends, the firmware-programmed bridge bus register is now cached during PCI enumeration. It is preserved when the bus mapping is identity, regardless of device/function remapping. If buses are remapped, the Primary, Secondary, and Subordinate bus numbers are translated according to the zone’s physical-to-virtual bus mapping.

The identity-mapping path has been verified on the LS3A6000 root zone, which can now boot successfully and detect the NVMe device behind the bridge. Guest zones, bus-remapping scenarios, and other architectures have not yet been runtime-tested.

Comment thread src/pci/pci_struct.rs Outdated

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In get_node(), since set_vbdf() is executed before config_value_init(), the firmware bus number hasn't been cached yet. This causes bridge_bus_reg to be incorrectly set to primary + 1. It would be more reasonable to call config_value_init() right before the final set_vbdf() at the end of get_node()

Comment thread src/pci/pci_struct.rs Outdated
&& (config.bus == physical_primary
|| (config.bus >= physical_secondary && config.bus <= physical_subordinate))
})
.all(|config| config.bus == config.v_bus);

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If the filter result is empty, .all() returns true, which might cause the guest Linux to see an incorrect bus.

Cache PCI configuration values before set_vbdf initializes the virtual bridge bus register. Also require at least one visible bus mapping before treating a bridge topology as identity-mapped.
@dallasxy
dallasxy merged commit df3a74b into syswonder:dev Aug 24, 2026
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agicy pushed a commit that referenced this pull request Aug 24, 2026
* fix(loongarch64): preserve firmware PCI bridge bus numbers

* fix(pci): preserve firmware bridge bus topology

Cache the firmware-programmed bridge bus register during enumeration for no_pcie_bar_realloc backends. Preserve it for identity bus mappings and translate primary, secondary, and subordinate bus numbers when a zone remaps buses.

* fix(pci): initialize bridge state before bus mapping

Cache PCI configuration values before set_vbdf initializes the virtual bridge bus register. Also require at least one visible bus mapping before treating a bridge topology as identity-mapped.
agicy pushed a commit that referenced this pull request Aug 24, 2026
* fix(loongarch64): preserve firmware PCI bridge bus numbers

* fix(pci): preserve firmware bridge bus topology

Cache the firmware-programmed bridge bus register during enumeration for no_pcie_bar_realloc backends. Preserve it for identity bus mappings and translate primary, secondary, and subordinate bus numbers when a zone remaps buses.

* fix(pci): initialize bridge state before bus mapping

Cache PCI configuration values before set_vbdf initializes the virtual bridge bus register. Also require at least one visible bus mapping before treating a bridge topology as identity-mapped.
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3 participants