Synthesizable AXI4 crossbar with a full UVM verification environment — RTL, SVA, coverage, stress, and CI.
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Updated
Aug 21, 2025 - SystemVerilog
Synthesizable AXI4 crossbar with a full UVM verification environment — RTL, SVA, coverage, stress, and CI.
Deterministic hardware verification engine that fails CI when connected components violate electrical or interface contracts.
Simulation-only validation ladder for mapping neural weight matrices to HRM-style photonic transfer functions.
A deterministic, multi-phase C++ PCIe protocol analyzer for decoding TLP traffic, validating transactions, modeling system behavior, and performing fault injection with cross-domain correlation (PCIe, CXL, NVMe).
Hardware-constrained validation of SRFM metastable structural diagnostics on IBM Quantum systems.
Utility scripts and diagnostics for Arduino boards — modular, reusable, and hardware-focused.
Hardware Control GateKeeper Kernels for AI inference within frameworks.
Linux hardware preflight: 18 sensor/memory/peripheral checks via /proc, /sys, syscalls, serial I/O — JSON + Markdown reports
A framework that ensures that Nitrux runs in a predictable, supportable, and well-understood environment.
Automated test infrastructure for 6+ power supply topologies. Precision measurement, real-time control, LED monitoring, and MySQL integration. Each test generates QR-code linked quality metrics. Embedded systems & hardware-software integration.
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