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networkonchip

Here are 5 public repositories matching this topic...

KevinWang96 / Chip-Multi-processor-System-based-on-Cardinal-Bidirectional-Ring-Network-on-chip

EE577b-Course-Project

verilog-hdl multiprocessor processor-design networkonchip synopsys-dc cadence-ncverilog cadence-conformal

Updated May 6, 2020
Verilog

talsania / network-on-chip

4-core mesh noc ip. check out my notes:

fpga systemverilog networkonchip

Updated Apr 19, 2026
SystemVerilog

dasbluehole / NOC_MAP

Core mapping on to NOC

asic noc silicon 2d-mesh networkonchip silicon-fabrication on-chip-network

Updated Nov 7, 2019
C

cognimachina / SWAN_paper

Code and simulation framework accompanying the SWAN NoC paper (NEORV32-based design)

interconnect neuromorphic-computing networkonchip

Updated Jul 3, 2026
VHDL

somayyes / Energy-Aware-NoC-using-VLSI

Verilog HDL implementation of FIFO, Level Shifter, and Ring Oscillator modules for VFI-based Network-on-Chip design, verified on Xilinx Vivado targeting Artix-7 FPGA

verilog vivado noc fgpa networkonchip low-power-design

Updated Aug 10, 2026
Verilog

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