This project implements a basic CPU architecture using Verilog. It is divided into two main parts:
- Part 1: Design and implementation of core CPU components such as the ALU, registers, and the ALU system.
- Part 2: Design and integration of the control unit, responsible for orchestrating instruction execution by sending control signals to the ALU system.
This part focuses on the foundational components of the CPU and includes:
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Register and Register File Design
Registers are used to store various types of data including addresses and instructions. -
Arithmetic Logic Unit (ALU) Design
The ALU is responsible for performing operations such as addition, subtraction, and other logic operations on the data stored in registers.
See Report 1 for an in-depth explanation of the ALU system.
The control unit was designed to work in tandem with the ALU system, enabling the execution of a set of 36 instructions. It generates the appropriate control signals based on the instruction set to guide the operation of the CPU.
See Report 2 for details on the control unit design and supported instruction set.